The design, verification and tapeout are complete, time to celebrate, to enjoy another successful design. At least until the silicon comes back. And then … If you are like most design teams at an ...

The rapid scaling of IC technology has produced smaller and faster devices, but along with this has come more resistive interconnects and increased coupling capacitance. With each new technology ...

Achieving design closure in a system-on-a-chip (SoC) development project generally requires a great deal of patience. SoCs tend to include more and more custom circuitry, which means long simulation ...

We are rapidly approaching a future where 5G telecommunications will be the norm. With its increased data speeds and bandwidth, 5G has the potential to change the way we live our lives. But what does ...

This full-chip, post-layout analysis tool factors in nanometer-level analog effects from the blurring of device and interconnect interfaces. As nanometer design projects become more commonplace, the ...

It is a rewarding experience for EDA developers and users to collaborate on deploying advanced techniques to improve design productivity. This blog will describe the experience of collaborating with ...